There are two basic types of mixing circuits in the electronic art. The first is a heterodyne mixing circuit, which combines the energy of two input signals by multiplying their instantaneous voltages to produce an output signal having new frequency components. The second type is what is often referred to as an audio mixer, which generates a linear sum of multiple input signals. The audio mixer is often used for combining multiple voice and music sources.
With reference to FIG. 1, a basic audio mixer 9 has multiple analog inputs Ain1-Ain3 applied to separate gain stages 11-15, respectively. Gain stages 11-15 adjust the weight of each input and are typically implemented as fixed or variable analog amplifiers. The outputs from gain stages 11-15 are applied to an analog summer 17 that produces a weighted linear sum of analog inputs Ain1-Ain3. A further discussion of audio mixers is found in The ARRL Handbook, 74th Edition, 1997, pages 15.1-15.3. If desired, analog output Aout may be applied to an analog-to-digital converter, A/D, 21 to produce a digital output Dout. A similar audio mixer is found in U.S. Pat. No. 5,589,830 to Linz et al.
The structure of FIG. 2 builds on that of FIG. 1 and all elements in FIG. 2 similar to those of FIG. 1 have similar reference characters. When the inputs to audio mixer 9 are digital, such as Din1-Din3, the inputs are traditionally applied to respective digital-to-analog converters, D/A, 25-29 before being applied to analog audio mixer 9. An example of such an audio mixer is presented in U.S. Pat. No. 5,647,008 to Farhangi et al. By converting digital inputs Din1-Din3 to the analog domain before mixing, some of the complexities associated with having multiple independently digitized inputs Din1-Din3 can be avoided. These complexities come from having to synchronize the digital inputs or any special circumstances such as the digital inputs not having similar sampling rates, quantization levels, or a common system clock.
Working in the digital domain, however, does offer advantages in terms of consistency and processing flexibility. Since digital processing is designed through a series of processing algorithms that can be implemented in code or digital circuitry, digital processing does not require tuning of components due to ambient changes or aging, as is the case in analog circuitry. Additionally, changes to the processing algorithm can be implemented with minimal or no changes to the digital circuitry. Thus, it is desirable to use the digital domain to process and to mix analog inputs signals.
An example of an audio mixer that processes analog inputs in the digital domain is shown in FIG. 3. All components in FIG. 3 similar to those of FIG. 1 are identified with similar reference characters and are defined above. Analog inputs Ain1-Ain3 are first applied to respective analog-to-digital converters, A/D, 31-35 under control of audio mixer 9. The resultant multi-bit output word from each A/D 31-35 can have its respective weight digitally adjusted by means of respective multipliers 37-41 and respective gain factors G1-G3. For example, multiplier 37 receives a multi-bit word from A/D 31 and multiplies the received word by its respective multi-bit gain factor G1. The multiplied output word from each multiplier 37-41 can be applied directly to a respective digital-to-analog converter 43-47, or can optionally first go through additional, respective processing steps 51-55 before being applied to its respective D/A 43-47. The outputs from each D/A 43-47 are applied to analog summer 17 and follow the same output stage as that of analog mixer 9 of FIG. 1.
The difficulties discussed above in reference to FIG. 2 associated with the mixing of independently digitized input signals are avoided in FIG. 3. This is because all analog inputs Ain1-Ain3 in FIG. 3 are quantized and digitized under control audio mixer 9, and the resultant digitized signals therefore have no unknown characteristics. Nonetheless, the structure of FIG. 3 still converts the multiplied and processed digital signals back to the analog domain before mixing them in summer 17. This is typical in the art (where circuit size is not an issue) and takes advantage of the relatively simple and robust structures of analog summers. A similar audio mixer is found in U.S. Pat. No. 5,438,623 to Begault.
Although not strictly related to the present invention, in order to offer a more complete overview of audio mixers, FIG. 4 shows an example of digital audio mixer 49 for mixing multiple, independently digitized inputs. In this example, a first digital input D1 is shown to have a lower sampling frequency than a second digital input D2. Digital audio mixer 49 also receives an analog input Ain1. To compensate for the unknown digitizing factors associated with each independently digitized input D1 and D2, the digital inputs must be synchronized before being processed and mixed. In the present example, the low sampling frequency of D1 is interpolated, i.e. up-converted, to a selected common factor frequency. Similarly the high frequency of D2 is decimated, i.e. down-converted, to the same selected common factor frequency.
There are various methods of interpolating and decimating digital signals, and typical methods are shown in FIG. 4. First, the sampling clock CLK1 of the A/D 61 is selected as the common factor frequency for synchronizing D1 and D2. CLK1 is applied to an interpolator 57, which receives D1, and applied to a decimator 59, which receives D2. Interpolator 57 adds new sample values in between the incoming D1 samples in order to generate an output sample rate on line 56 at the frequency dictated by CLK1. Various algorithms exist for selecting the new sample values, but this is not critical to the discussion. Decimator 59 likewise produces an output sample rate on line 58 at a frequency determined by CLK1. In the present example, decimator 59 accomplishes this by ignoring, i.e. throwing away, every other incoming D2 sample. A further discussion of decimators and interpolators can be found in The ARRL Handbook, 74th Edition, 1997, pages 18.1-18.18.
First digital input D1, second digital D2, and the digitized representation of analog input Ain1 are thus synchronized and ready to be processed. D1, D2 and the output of A/D 61 have their weights individually adjusted by means of respective multiplier circuits 63-67 and respective gain factors G1-G3 before being applied to a digital summer 69. Digital summer 69 produces a mixed audio output at a frequency of CLK1. If this mixed audio output frequency CLK1 is too high for subsequent processing stages, then it may be necessary to down-convert the output frequency of summer 69 by means of a second decimator 70. This and other methods of digitally mixing multiple, independently digitized inputs are further discussed in U.S. Pat. No. 5,647,008 to Farhangi et al. and U.S. Pat. No. 5,729,225 to Ledzius.
FIG. 5 returns to the focus of this application, i.e. the digital mixing of multiple analog inputs. All elements in FIG. 5 similar to those of FIG. 3 have similar reference characters and are defined above. Like in FIG. 3, the structure of FIG. 5 shows analog inputs Ain1-Ain3 applied respective A/D converters 31-35, and the output of each A/D converter 31-35 is applied to a respective multiplier circuit 37-41. Unlike FIG. 3, however, the resultant outputs from multipliers 37-41 in FIG. 5 are applied to a digital summer 71 (accumulator) for mixing within the digital domain. No special circuitry for synchronizing the digitized inputs is necessary since there are no unknown digitizing factors. This is because analog inputs Ain1-Ain3 are directly quantized and digitized under control of the audio mixer 9. Not subjecting the multiplied signals to a D/A conversion before summing, as is down in FIG. 3, is especially advantageous if further digital processing is required in later stages. This is because a signal is degraded every time it undergoes a D/A and A/D conversion. Optionally, however, Dout may be applied to a D/A converter 73 to also provide an analog output Aout. A similar structure is shown in U.S. Pat. No. 5,483,528 to Christensen.
The structure of FIG. 5 has traditionally been limited to the circuit board level due to the complexities and large area requirements of integrated analog sub-circuits. Additionally, digital multipliers 37-41 are likewise large digital circuits requiring large amounts of IC chip area. Thus, providing separate A/D's 31-35 and separate multipliers 37-41 for each input Ain1-Ain3 makes integration of the structure of FIG. 5 into a single IC chip prohibitive.
An approach toward facilitating the integration of A/D converters in an IC is to limit the number of analog circuit stages. One method of doing this is through an over-sampling technique wherein one trades the high frequency capability of integrated digital circuits in exchange for fewer quantization levels, and hence fewer analog sub-circuits.
An effective over-sampling analog-to-digital converter well suited for IC integration is the delta-sigma, .DELTA./.SIGMA., analog-to-digital converter shown in FIG. 5. Each .DELTA./.SIGMA. A/D, 31-35, includes a delta-sigma modulator 72 followed by a sigma-decimation filter 74. A delta-sigma modulator 72 samples an input signal at many times the input signal's Nyquist frequency. As the sampling frequency is increased, the quantization levels, and hence bit-resolution, may be reduced. A typical .DELTA./.SIGMA. modulator 72 has a one-bit resolution. The resultant one-bit data stream is collected by sigma-decimation filter 74, which includes a low-pass filter and resampler, and is typically based on IIR or FIR structures. Sigma-decimation filter 74 removes out-of-band quantization noise and then resamples at the Nyquist frequency to obtain a rate reduction, or decimation. In effect, the sigma-decimation filter 74 subdivides the incoming one-bit data stream from delta-sigma modulator 72 into large groups of one-bit samples, and then reshapes and combines each large group of one-bit samples to produce a composite multi-bit output with a typical resolution greater than 10 bits. A more detailed discussion of delta-sigma modulators and sigma-decimation filters in the construction of analog-to-digital converters is found in Analog VLSI: Signal and Information Processing, by Ismail et al., 1994, pages 467-505.
It is unfortunate that the term "decimation" is used in the art to refer to both the traditional decimation filter 59 of FIG. 4 and the sigma-decimation filter 74 FIG. 5. The two decimating filter circuits 59 and 74 are actually very different in objective, functionality and design. A detailed comparison of the two decimation filters 59 and 74 is beyond the scope of this paper. It should be noted, however, that the objective of the traditional decimation filter 59 is to meet a certain frequency response specification, typically by throwing away every-so-many samples of an incoming signal. By contrast, the objective of the sigma-decimation filter 74 is to suppress output-of-band quantization noise and to reconstruct a data word having a higher bit-resolution than the incoming signal.
In spite of the integratability of delta-sigma analog-to-digital converters, however, they are still very large and complicated circuits. This makes the notion of including a separate delta-sigma analog-to-digital converter for each analog input in an IC impractical both in terms of real estate and cost.
One approach towards reducing the number of delta-sigma analog-to-digital converters per input is shown in FIG. 6. Here, multiple analog inputs Ain1-Ain3 time-share a single delta-sigma analog-to-digital converter 77. Input signals Ain1-Ain3 are applied to a multiplexer 75, which alternates access to the single .DELTA./.SIGMA. A/D 77. The output from .DELTA./.SIGMA. A/D 77 then goes through a demultiplexer 79 and is applied to a selected one of digital output signals Dout1-Dout3. This structure, however, limits the frequency of input signals Ain1-Ain3 since they must be slow enough to sequentially share a single .DELTA./.SIGMA. A/D 77. This severely restricts its use in audio applications, and has traditionally been used in control systems to monitor slow varying variables such as temperature changes. Additionally, since the outputs Dout1-Dout3 are generated piecemeal sequentially, the structure does not lend itself to an audio mixer circuit, which requires that its input signals be supplied simultaneously in order to be mixed together. More information on this type of multi-input, delta-sigma analog-to-digital converter is found in U.S. Pat. No. 5,345,236 to Sramek Jr. and U.S. Pat. No. 5,561,425 to Therssen.
It is an object of the present invention to provide audio mixer structure that is suitable for integration into a single IC and can digitally mix multiple analog inputs.
It is another object of the present invention to provide an integrated audio mixer which uses delta-sigma type analog-to-digital converters, but which does not suffer from the large real estate requirements of traditional delta-sigma A/D structures.
It is still a third objective of the present invention to provide a structure that permits multiple, different analog inputs to share sub-components of a delta-sigma analog-to-digital converter without placing any additional frequency limitations on the input signals.